Design & Application of IR2136 3-Phase Driver

^{August 20, 2025 News — Against the backdrop of booming industrial automation and new energy applications, the three-phase bridge driver chip IR2136STRPBF is emerging as a core solution in the field of motor control, thanks to its outstanding technical features. Utilizing advanced high-voltage integrated circuit technology, the chip supports a withstand voltage of 600V and a wide input voltage range of 10-20V, providing efficient driving support for inverters,electric vehicles, and industrial equipment.}

I. Key Product Technical Highlights

Smart Drive Architecture
The IR2136STRPBF integrates six independent drive channels, including three high-side and three low-side outputs, with matched propagation delay controlled within 400 nanoseconds. Its innovative bootstrap circuit design requires only a single power supply, and with just a 1μF external capacitor, it enables high-side driving, significantly simplifying system architecture.

Multi-Protection Mechanisms

Real-time Overcurrent Protection: Detects current signals via the ITRIP pin, with a response time of less than 10 microseconds.

Voltage Adaptability: Built-in undervoltage lockout (UVLO) automatically shuts off output during power abnormalities.

Wide Temperature Operation: A working range of -40°C to 150°C meets demanding environmental requirements.

Key Performance Parameters

II. Typical Application Analysis

Industrial Inverter Control
In servo drive systems, this chip achieves highly efficient motor control through precise PWM modulation. Combined with soft-switching technology, it reduces switching losses by over 30%. Its shoot-through prevention design significantly enhances operational reliability, making it particularly suitable for critical applications such as automated production lines.

New Energy Vehicles
As a core component of the main drive inverter in electric vehicles, the chip supports high-frequency switching up to 50kHz. The bootstrap circuit design ensures stable operation during battery voltage fluctuations, providing continuous and reliable power output for the vehicle.

Intelligent Power Modules
Power modules integrating this chip have been widely adopted in high-power equipment above 1500W. Compared to traditional solutions, they reduce the number of peripheral components by 35%, significantly lowering system costs.

^{III. Circuit Design Guidelines}

1.Key Peripheral Circuit Optimization

Bootstrap Circuit Design:
It is recommended to use low-ESR tantalum capacitors (1μF/25V, ESR < 0.5Ω) paired with ultrafast recovery diodes (e.g., MUR160, Trr ≤ 60ns). For high-frequency applications (>50kHz), the capacitor value should be increased to 2.2μF, and a 0.1μF ceramic capacitor should be placed near the VCC pin to suppress high-frequency noise.

Gate Drive Configuration:​
A standard 10Ω gate resistor is recommended, with the exact value determined by the following formula:

Where V_drive = 15V and V_{ge_th} is the IGBT threshold voltage. It is recommended to reserve an adjustable resistor position (5-20Ω range) for real-world optimization during testing.

2.PCB Layout Specifications

Power Loop Design:

The high-side drive loop area must be limited to within 2 cm², adopting a "star" grounding configuration. Recommendations:

    1. Use 2oz thick copper foil to reduce impedance.

     2.Key traces (HO → IGBT → VS) should have a width ≥ 1mm.

     3. Minimum spacing between adjacent phases ≥ 3mm (for 600V systems).

Signal Isolation Measures:

      Logic signals and power traces should be routed on separate layers, with a ground isolation layer in between.

      FAULT signal lines must use twisted-pair or shielded wiring.

      Add TVS diodes (e.g., SMAJ5.0A) at the MCU interface.

3.Thermal Management Solution

Chip Power Consumption Calculation:

Under typical operating conditions (Qg=100nC, fsw=20kHz), power dissipation is approximately 1.2W, requiring:

       PCB heat dissipation copper area ≥ 4cm²

       Addition of thermal vias (0.3mm diameter, 1.5mm pitch)

       Installation of heatsinks recommended when ambient temperature exceeds 85°C

4.System-Level Verification Process

Double-Pulse Testing:
Oscilloscope monitoring requirements:

      Miller plateau duration (should be <500ns)

      Turn-off voltage spike (must be <80% of IGBT rated Vce)

      Gate drive waveform ringing amplitude (must be <2V)

EMC Optimization:

      Parallel X2 safety capacitor (100nF/630V) across DCBUS terminals

      RC snubber circuits per phase output (typical values: 100Ω+100pF)

      Ferrite beads for high-frequency noise filtering (e.g., Murata BLM18 series)