Low-Drift AD633ANZ Analog Multiplier Delivers 1% Total Error, Expanding ADI’s Signal Processing Portfolio

^{In analog signal processing chains, the four-quadrant analog multiplier plays an irreplaceable role, serving as a fundamental unit for implementing key functions such as modulation/demodulation, voltage-controlled gain, and real-time computation. Faced with the growing demand in industrial and consumer electronics for signal conditioning solutions that offer high cost-effectiveness, reliable accuracy, and design simplification, the classic AD633ANZ continues to demonstrate its unique engineering value. Leveraging its mature and robust architecture, the chip precisely addresses three core needs: multi-domain adaptability, minimalist peripheral design, and rapid solution deployment. It is widely deployed as a reliable "analog computing operator" in communication systems, instrumentation, and control systems. The following section will analyze how it achieves broad functional enablement through its streamlined design.}

^{Core Technical Analysis (Key Highlights)
The core technical advantage of the AD633ANZ is not the pursuit of extreme parameters but rather transforming high-performance analog computation into stable and easy-to-use solutions through sophisticated engineering design. Its differentiated technology directly addresses customers' deep-seated needs for production friendliness and design simplicity.}

^{Laser Wafer Trimming and Built-in Precise 10V Scaling Factor.}

^{Technical Advantage：During manufacturing, the chip's core multiplier scaling factor is precisely set to 10V through laser trimming technology. The key to this technology lies in its built-in precision reference source, which ensures the initial accuracy and temperature stability of the scaling factor.}

^{Practical Value： In application, engineers do not need to perform cumbersome gain calibration or connect expensive external precision voltage reference sources. This directly enables "out-of-the-box" functionality, significantly reducing production debugging costs and time, and simplifying the Bill of Materials (BOM).}

^{Fully Differential High-Impedance Input Structure}

^{Technical Advantage：Both the X and Y channels employ a complete differential high-impedance input stage. This structure not only supports true four-quadrant operation (handling both positive and negative voltages) but also provides excellent common-mode rejection capability.}

^{Practical Value：The design allows flexible configuration for either single-ended or differential input, significantly enhancing immunity to power supply noise and ground interference. Customers can directly interface with sensors or preceding stage signals in complex electrical environments without needing to add extra buffering or conditioning circuits, thereby improving overall system accuracy and reliability.}

^{Independent High-Impedance Summing Input (Z Pin)}

^{Technical Advantage：Provides an independent summing input pin, allowing the multiplication result to be combined with an external signal within the chip without loss.}

^{Practical Value： This design endows the circuit with exceptional functional flexibility. Simply by altering external connections, the same hardware configuration can be easily transformed into an analog divider, a voltage-controlled filter, or a modulator with adjustable offset—all without adding core peripheral components. This effectively achieves multiple analog computation functions at the cost of a single chip, greatly expanding the application range while reducing hardware complexity and design risk.}

^{Core Product Parameters}

^{Computational Accuracy}

^{Total Nonlinear Error (X Channel) 0.4% Suitable for General-Precision Scenarios：This accuracy level meets the requirements of most analog modulation, gain control, and sensor signal conditioning applications, serving as the foundation for functional reliability.}

^{Dynamic Performance}

^{Small-Signal Bandwidth (-3dB) 1 MHz Suitable for Low-to-Medium Frequency Signal Processing： Applicable to audio processing, intermediate frequency modulation/demodulation, mechanical sensor signal analysis, and other applications typically requiring bandwidth within several hundred kHz.}

^{Full-Power Bandwidth (20Vpp) 100 kHz Ensures Large-Signal Fidelity： This parameter guarantees signal waveform integrity when driving high-swing outputs (e.g., to subsequent circuitry).}

^{1. Core Pin Definition and Connection
Only 7 pins of this chip are essential for its core functionality; the rest are no-connect or power pins：}

^{Signal Inputs: X1 (Pin1), X2 (Pin2) and Y1 (Pin3), Y2 (Pin4) are two differential input pairs. For typical single-ended usage, connect the signal to be processed to X1 or Y1, and ground the corresponding X2 or Y2.}

^{Functional Core: Z (Pin7) is the high-impedance summing input. This is the key pin for enabling flexible functions such as addition or constructing a divider.}

^{Output: W (Pin10) is the operation result output, usually connected to the input of subsequent circuitry or fed back to itself (e.g., to the Z pin).}

^{Power Supply: V+ (Pin12) and V- (Pin8) require connection to positive and negative power supplies, and decoupling capacitors (e.g., 0.1μF) must be placed close to these pins.}

^{February 3, 2026, China News – The AD633ANZ is a low-cost, highly integrated four-quadrant analog multiplier integrated circuit from Analog Devices. Its most notable feature lies in its ability to realize multiple analog computation functions—such as multiplication, division, filtering, and modulation/demodulation—by simply altering external connections within its 8-pin PDIP package, all without requiring peripheral components. Leveraging laser trimming technology, it guarantees 2% computational accuracy and low noise performance. This chip is widely used in signal modulation/demodulation, automatic gain control (AGC), power measurement, audio processing, and industrial measurement and control systems. It offers engineers an ideal solution that enables both precise cost control and significant design simplification in general-purpose analog computing scenarios.}

^{The core highlight of this chip lies in its exceptional functional flexibility. Through an internally integrated computation core and laser trimming technology, simply by altering the external pin connections, the same chip can be flexibly configured as a multiplier, divider, square rooter, filter, or modulator—all without requiring any peripheral components. This "change-a-wire, switch-a-function" capability offers engineers immense design freedom, enabling a single chip to handle multiple analog computation needs. It significantly simplifies circuit design, reduces BOM costs, and enhances system reliability.}